Great strides have been made in memory technology to increase speed, have higher capacity and be more fault-tolerant. Speed and higher capacity in memory devices is achieved primarily by making the memory elements or cells smaller and more densely packed. Because memory element size is also proportional to cost per bit, the goal of memory manufacturers is to push the memory element size down as much as practicable. By reducing the cell size, these memory devices become competitive in cost and capacity for use as embedded memory in consumer electronic products and toys, as well as computers and other devices.
Shrinking the size of integrated circuits and memory devices is not a simple and straightforward task. The reduction in size and increase in density often introduces defects in the memory elements due to unperfected manufacturing processes and other failures. Some yield-reducing defects may include, for example, stuck-at faults, transition faults, coupling faults, and pattern-sensitive faults.